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    <compoundname>ViterbiTCH_AFS5_9::candStruct</compoundname>
    <includes refid="AmrCoder_8h" local="no">AmrCoder.h</includes>
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        <type>uint32_t</type>
        <definition>uint32_t ViterbiTCH_AFS5_9::candStruct::iState</definition>
        <argsstring></argsstring>
        <name>iState</name>
        <briefdescription>
<para>encoder input associated with this candidate </para>        </briefdescription>
        <detaileddescription>
        </detaileddescription>
        <inbodydescription>
        </inbodydescription>
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        <referencedby refid="classViterbiTCH__AFS5__9_1aa93f196928f7fcc126d28445838d26ae" compoundref="AmrCoder_8h" startline="644" endline="650">ViterbiTCH_AFS5_9::vitClear</referencedby>
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        <type>uint32_t</type>
        <definition>uint32_t ViterbiTCH_AFS5_9::candStruct::oState</definition>
        <argsstring></argsstring>
        <name>oState</name>
        <briefdescription>
<para>encoder output associated with this candidate </para>        </briefdescription>
        <detaileddescription>
        </detaileddescription>
        <inbodydescription>
        </inbodydescription>
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        <type>char</type>
        <definition>char ViterbiTCH_AFS5_9::candStruct::rState[mIRate]</definition>
        <argsstring>[mIRate]</argsstring>
        <name>rState</name>
        <briefdescription>
<para>real states of encoders associated with this candidate </para>        </briefdescription>
        <detaileddescription>
        </detaileddescription>
        <inbodydescription>
        </inbodydescription>
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        <type>float</type>
        <definition>float ViterbiTCH_AFS5_9::candStruct::cost</definition>
        <argsstring></argsstring>
        <name>cost</name>
        <briefdescription>
<para>cost (metric value), float to support soft inputs </para>        </briefdescription>
        <detaileddescription>
        </detaileddescription>
        <inbodydescription>
        </inbodydescription>
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    <briefdescription>
    </briefdescription>
    <detaileddescription>
<para>A candidate sequence in a Viterbi decoder. The 32-bit state register can support a deferral of 5*order with a 6th-order coder. </para>    </detaileddescription>
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